As technology evolves, semiconductor devices are becoming smaller and more dense resulting in corresponding increases in overall chip failure rates, which in turn results in uncompetitive situations for chip manufacturers. There is therefore a need and desire by manufacturers of chips and semiconductor devices to be able to readily identify and eliminate the use of defective chips before the defective chips are finally mounted in a product.
Burn-in processes have evolved and have been developed in an effort to identify and eliminate the use of defective chips. A chip carrier is provided, which typically is a substrate, for testing the chips. The chip carrier has electrical contacts which correspond to the electrical contacts on the semiconductor chip. It is desirable for the carrier contacts to be mechanically weak but strong enough for holding the semiconductor chip in place during testing and to maintain good electrical connections. The chip is normally positioned on the chip carrier so that the solder balls on the chip are aligned with the corresponding contacts on the carrier and then the solder balls are partially reflowed to make electrical connections between the chip and the carrier. It is desirable to provide for the easy removal of the chip from the carrier after the burn-in test so that defective chips can be discarded or used elsewhere and good chips can be identified and permanently used. The carrier can then be re-used for testing of further similar chips. It is thus desirable to be able to temporarily attach the semiconductor chip to the carrier in such a way that it can be readily separated after the burn-in test without mechanical damage to either the chip or the carrier.
In general, the burn-in test exercises or operates the chip at elevated voltage and temperature levels for an extended period of time in order to simulate the actual operation of the chip for its normal and expected lifetime in a final product by monitoring the electrical responses of the chip and thus be ensured of its proper operation without failing. This procedure is well known to those familiar with this semiconductor technology.
A variety of processes and techniques have been devised and described in the prior art to form a temporary connection between semiconductor chips and carriers, so as to be able to readily separate the chip and the carrier after burn-in tests have been conducted.